1. Field of the Invention
The present invention relates to low voltage differential swing driver circuits and more particularly, to cancellation of R.sub.ON resistance for a switching transistor in LVDS driver circuits.
2. Description of the Related Art
The constant need to transfer more information faster, accompanied by increases in data processing capability, has necessitated an expansion to data transfer rates considerably higher than what was previously possible. As a consequence, a protocol referred to as 100 Base-T was developed for extending IEEE Standard 802.3 to accommodate data moving at an effective transfer rate of 100 Mbps through twisted-pair cables. Under the 100 Base-T protocol, certain control bits are incorporated into the data before it is placed on a twisted-pair cable. The result is that the data and control signals actually move through a twisted-pair cable at 125 Mbps.
One type of data transmission is differential data transmission in which the difference in voltage levels between two signal lines form the transmitted signal. Differential data transmission is commonly used for data transmission rates greater than 100 Mbps over long distances. Noise signals shift the ground level voltage and appear as common mode voltages. Thus, the deleterious effects of noise are substantially reduced.
To standardize such data transmission various standards have been promulgated. For example, one such standard is the recommended standard 422, RS422, which is defined by the Electronics Industry of America, EIA. This standard permits data rates up to 10 million baud over a twisted pair of signal lines. Driver circuits place signals on the lines. These drivers circuits must be capable of transmitting a minimum differential signal in the range of two to three volts on the twisted pair line which typically terminates in 100 ohms of resistance.
One problem with RS422 is that the twisted line pair is often used as a bus to which multiple driver circuits, sources of signals, are attached. In one type of conventional circuit, when multiple drivers are connected to a common bus, only one driver may transmit data at a time. The remaining drivers should be in a high impedance state so as to not load the bus. Since large positive and negative common mode signals may appear at the driver output terminals connected to a bus system, the maintenance of a high impedance over a wide common mode voltage range independent of whether the driver is powered or not, is desirable.
An example of a conventional low voltage differential swing (LVDS) driver circuit 100 is shown in FIG. 1. The difference in voltage between the output signals OUT+, OUT- on the output terminals 103, 105 form the pair of differential signals. A pair of differential signals means two signals whose current waveforms are out of phase with one another. The individual signals of a pair of differential signals are indicated by reference symbols respectively ending with "+" and "-" notation, e.g., S+ and S-. The composite notation "+/-" is employed to indicate both differential signals using a single reference symbol, e.g., S+/-.
The LVDS driver circuit 100 includes a resistor R1 coupled to a reference voltage VREF, four n-channel metal oxide semiconductor (NMOS) switches M11-M14, and a resistor R2 coupled between the common node COM and voltage supply VSS. The four transistor switches M11-M14 are controlled by input voltage signals VIN1, VIN2 and direct current through load resistor RL as indicated by arrows A and B. The input voltage signals VIN1, VIN2 are typically rail-to-rail voltage swings.
The gates of NMOS switches M11 and M14 are coupled together to receive input voltage signal VIN1. Similarly, the gates of NMOS switches M12 and M13 are coupled together to receive input voltage signal VIN2.
Operation of the LVDS driver circuit 100 is explained as follows. Two of the four NMOS switches M11-M14 turn on at a time to steer current from resistor R1 to generate a voltage across resistive load RL. To steer current through resistive load RL in the direction indicated by arrow A, input signal VIN1 goes high turning ON NMOS switches M11 and M14. When input signal VIN1 goes high, input signal VIN2 goes low to keep NMOS switches M12 and M13 OFF during the time NMOS switches M11 and M14 are ON. Conversely, to steer current through resistive load RL in the direction indicated by arrow B, input signal VIN2 goes high and is applied to transistor switches M12 and M13 to make them conduct. Input signal VIN1 goes low to keep NMOS switches M11 and M14 OFF during this time. As a result, a full differential output voltage swing can be achieved.
When MOS transistors are used as switches in semiconductor manufacturing, such as in LVDS driver circuit 100, the on resistance R.sub.ON of the transistor becomes a significant factor. The on resistance of a MOS transistor is determined by: ##EQU1##
where VDS is the drain to source voltage and ID is the drain current of the MOS transistor. In addition, ##EQU2##
where KP is a constant, W/L is the ratio of the width (W) and length (L) of the MOS transistor, VGS is the gate-to-source voltage of the MOS transistor, and VT is the threshold voltage needed to turn the MOS transistor ON. This equation is approximately equal to (assume VGS-VT&gt;&gt;VDS/2): ##EQU3##
Thus, the on resistance R.sub.ON of MOS transistor depends upon KP and VT which are both process sensitive, and VGS which depends upon the supply voltage VDD and is, thus, application dependent.
Referring again to FIG. 1, the current IL through resistor RL is: ##EQU4##
where R.sub.ON1 is the on resistance of one of the MOS transistors M11 or M12, depending upon which of the two transistors M11, M12 is ON; where R.sub.ON2 is the resistance of one of the MOS transistors M13 or M14 depending upon which of the two transistors M13, M14 is ON; and where R1, R2 and RL are the resistance of resistors R1, R2, and RL respectively. Reference voltage VREF can be generated from bandgap voltage such that it is process and temperature independent. Based on equation (4), it can be seen that current IL depends on resistances R.sub.ON, R1, R2 and RL.
The use of resistances R1 and R2 can result in less variation in current IL due to the on-resistance R.sub.ON of MOS transistors. However, the values of resistors R1 and R2 become dominant variables since they can vary in a range of +/-20% typically in semiconductor manufacturing.
Therefore, a need exists for a circuit that can make the current IL through resistor RL independent of the on-resistance R.sub.ON of MOS transistors.